Santa Clara, CA - September 27, 2010 - Intilop Inc., a leading developer and provider of advanced high complexity IPs and system solutions in Network protocol processing, traffic acceleration, traffic management and network security, today announced its flagship 10 G bit TCP Offload Engine that delivers highest throughput and least latency in the industry. The latency of ~100 ns was made possible by patent pending advanced dynamic array search architecture. The 10Gbit TCP/IP offload engine (full Offload) also integrates a 10Gbit Ethernet MAC (10GbE) controller, variety of CPU interfaces (optional), UDP Offload (optional), DDRx memory interface (optional), PCIe Gen-2 (optional). This 10G TOE reduces CPU’s involvement in TCP processing by more than 95%, presents a very attractive solution to the latency sensitive financial markets and is a critical building block for the current and future high performance networking equipment in converged IP networks. It is targeted towards Xilinx Vertex 5/6, Altera GXIII/IV FPGA families. A detailed performance report is available upon request.
Due to its flexible architecture, the developers of high end FPGAs/ASICs/ASSPs, Network adapters, Lan-on-Mother board (LOM) and very large scale FPGA-SoC IP integrators can provide differentiated solutions to the end users in financial markets, web servers, email servers, high end servers in Data centers, Government network systems, university network systems. The 10G TOE is intilop’s 3rd generation flagship TOE architecture, based upon their industry-proven 1 G TOE architecture. The highly flexible and scalable architecture offers customers, ability to customize it to suite their specific application.
The highly integrated, highly scalable full Offload TOE employs patent pending high performance VLIW microcode machines and advanced search hardware design techniques that test the limits in FPGA and ASIC design/integration technologies. It employs best of cut-through and store-and-forward architectural features that utilize intilop’s third generation TOE, EMAC and RDMA designs. There are so many features that are easily configurable which make the value proposition even more useful and powerful. The unprecedented customizable features as options include; scalable number of TCP sessions, type of CPU interface, On-chip DDRx controller, On-chip PCIe interface, multiple (2-4) 10G Ethernet MACs, VLAN support, TCP Bypass mode, Fiber Channel over Ethernet (FCoE) support and others.
"We responded to our existing TOE customer’s requests to deliver TOE engines with least latency and highest bandwidth possible that is also scalable. Having a fixed architecture does not provide the capability to deliver differentiated solutions. We hope that with this type of scalability, flexibility and performance, Intilop’s 10G TOE really opens up tremendous opportunities for next generation of hyper performance advanced system solutions in IP networks”, said K Masood, President and CTO.
Intilop Corporation is a custom IP developer, SoC/ASIC/FPGA integrator and engineering services provider for Networking, Network Security, storage and Embedded Systems. They offer silicon proven semiconductor IP and services with comprehensive hardware and software experience.
4800 Great America Pkwy Ste 231
Santa Clara, CA 95054
Ph: 408-496-0333, Fax: 408-496-0444