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Here are a few press releases about Intilop. |
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| September 12th, 2017 |
Adaption of their TCP and UDP Acceleration Technology becomes more widespread around the globe and in the University circle that includes: University of Texas, University of Bristol, University of Washington, High Energy Physics Institute-China and several others in previous years.
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| March 29th, 2017 |
Another industry first: As the adaption of their TCP Acceleration Technology becomes more widespread around the globe that includes Government Security, Universities, Cloud Servers, Financial and many other equipment classes, this Security module is an add on module to their TCP and UDP Accelerators providing unprecedented functionality of Network Traffic Security combined with Full TCP & UDP Acceleration at 10G.
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| June 30th, 2016 |
Another industry first: As the adaption of their TCP Acceleration Technology becomes more widespread around the globe that includes Network Security infrastructure and other equipment classes, this Security module with up to 1K sessions, is an add on feature to their existing mature series of TCP and UDP Accelerators which provide unprecedented functionality of Network Traffic Security combined with Full TCP/UDP Acceleration at 10G and soon 40G line rate.
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| March 20th, 2016 |
Another industry first: As the adaption of their TCP Acceleration Technology becomes more widespread around the globe that includes Security infrastructure and other equipment classes, this Security module is an add on module to their TCP and UDP Accelerators providing unprecedented functionality of Network Traffic Security combined with Full TCP/UDP Acceleration at 10G and soon 40G line rate.
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| Nov 24th, 2015 |
This industry first, 8th Generation TCP & UDP Accelerator series from Intilop, now running at 40G/25G with Ultra-Low Latency across thousand sessions is based on the most mature 10G TCP&UDP core that is in volume production and deployed around the globe in several networking equipment classes
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| Nov 10th, 2015 |
As the adaption of their cores becomes more widespread around the globe, this subsystem attaches to their TCP and UDP accelerators and provides unprecedented functionality to all software developers
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| Oct 8th, 2015 |
Another industry first: The 8th Generation TCP & UDP Accelerator series, now running at 40G/25G with Ultra-Low Latency, is a wider extension of their most mature and widely adapted 10G TCP & UDP Acceleration technology solutions across various classes of networking equipment worldwide
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| Aug 7th, 2015 |
This 7thgeneration subsystem provides unprecedented functionality of all 4 complex protocols; TCP, UDP, IGMP & ARP in a single core. It is an offshoot of their 1024 Session Core that uses internal FPGA memory only, exhibits receive latency of 77 nanoseconds with 97% TCP throughput, providing 8x – 20x advantage over the legacy Software TCP stack.
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| Jul 8th, 2015 |
This 7th generation TCP & UDP Accelerator is an optimized version of their 16K Session Core uses internal FPGA memory only, exhibits receive latency of 77 nanoseconds with 97% TCP throughput, providing 8x – 20x advantage over the legacy Software TCP stack. Also adds IGMP-v2 processing
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| Apr 14th, 2015 |
Hyper Performance Network Acceleration technology using latest TCP and UDP offload Engines will be presented at the Ethernet Technology Summit, April 14 - 16, 2015 at Santa Clara Convention Center, Santa Clara, CA. in Room B-103.
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| Apr 3rd, 2015 |
The 6th generation TCP Core Accelerates an unprecedented number of 16K TCP & UDP Sessions in 77 nanoseconds with 97% TCP throughput, providing 8x – 50x advantage over the legacy Software TCP stack
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| Nov. 13th, 2014 |
The complete Network Accelerator Sub-System with pre-ported and functional ‘Full TCP stack’ features Alpha Data ADM-PCIE-7V3 card and Xilinx Virtex-7 FPGA with Intilop’s 6th generation TOE
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| Oct. 15th, 2014 |
The complete ‘Full TCP stack’ pre-ported and verified, available on an Alpha Data V7 card with Intilop’s 6th generation industry leader TCP Accelerator that delivers ‘77 nanosecond TCP processing times and 97% TCP throughput. Network Hardened, most reliable, mature and most widely adapted worldwide since 2009.
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| Sep 4th, 2014 |
The Complete ‘Full TCP stack’ pre-ported and verified on Altera Stratix IV/V Platform with Intilop’s 6th generation industry leader, delivers ‘77 nanosecond TCP processing times and 97% TCP throughput. Network Hardened, most reliable, mature and most widely adapted worldwide over the last 5 years.
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| July 15th, 2014 |
The Complete ‘Full TCP stack’ pre-ported and verified on Xilinx Virtex-7 FPGA with Intilop’s 6th generation industry leader, delivers ‘77 nanosecond TCP processing times and 97% TCP throughput. Network Hardened, most reliable, mature and most widely adapted worldwide over the last 5 years.
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| July 2th,2014 |
The Complete 'Full TCP and UDP stack' pre-ported and tested with their 6th generation industry leader ‘77 nanosecond TCP& UDP processing times and 95% TCP throughput’, Network Hardened, most reliable, mature and most widely adapted worldwide over the last 5 years.
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| June 12th,2014 |
The 6th generation industry leader with 77 nanosecond TCP & UDP latency and 95% throughput, Network Hardened, most mature and most widely adapted worldwide over the last 5 years, Intilop’s UDP & TCP Accelerators are targeted towards the next generation of Cloud Computing, Data Center, Network Security, Telecomm and all other Hyper Performance Networked Computing applications.
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| April 24th,2014 |
Milpitas, CA – April 24, 2014 - Intilop Inc., a leading developer and provider of advanced high complexity IPs and system solutions in Network Protocol Processing, Traffic Acceleration, Traffic Management and Network Security, announced a strategic collaboration with Xilinx, All Programmable solutions provider, to provide TCP and UDP Acceleration IP cores and solutions as a Xilinx Alliance Member in its Smarter Networks ecosystem.
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| April 20th,2014 |
Intilop, Inc. a pioneer and a recognized leader in providing Ultra-Low latency networking Mega IP building blocks, systems and solutions, announced their 10G EMAC, UDP/TCP IP cores will be embedded in the OpenCL development kit and offered to end customers as a pre-integrated and system tested FPGA platform for Accelerated Networking systems. This offers a great value proposition for reduced development time and accelerated Time-to-Market.
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| March 5th,2014 |
Intilop, Inc. a pioneer and a recognized leader in providing Ultra-Low latency networking Mega IP building blocks, systems and solutions, announced their 10G EMAC, UDP/TCP IP cores will be embedded in the OpenCL development kit and offered to end customers as a pre-integrated and system tested FPGA platform for Accelerated Networking systems. This offers a great value proposition for reduced development time and accelerated Time-to-Market.
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| November 5th,2013 |
Intilop, Inc. a pioneer and a recognized leader in providing Ultra-Low latency networking Mega IP building blocks, systems and solutions, announced they will showcase Altera’s SDK for OpenCL™ with their 5th Gen. SX-Series 10G Ultra-Low latency UDP/TCP Offload Core delivering sub-micro second wire-to-host latency.
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| Octber 30th,2013 |
Intilop, Inc. a pioneer and a recognized leader in providing Ultra-Low latency networking Mega IP cores, systems and solutions, announced they will present, at the show, their Ultra-Low latency and high performance TCP and UDP Acceleration Technology and solutions that deliver greater than 2 Gigabyte/s per port and sub-micro second wire-to-host latency.
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| October 21st,2013 |
Intilop, Inc. a pioneer and a recognized leader in providing Ultra-Low latency networking Mega IP building blocks, systems and solutions, announced they will present their 5th Gen. SX-Series 10G Ultra-Low latency TCP Offload & UDP Offload Technology and solutions based around them that deliver greater than 1G Byte per port and sub-micro second wire-to-host latency.
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| September 25,2013 |
Intilop, Inc. a pioneer and a recognized leader in providing Ultra-Low latency and high performance network acceleration Mega IP cores and system solutions, announced performance test results of their hyper performance FPGA-NIC system solutions using Altera’s™ Stratix IV/V powered by their industry leading 5th Gen.
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| September 17,2013 |
Intilop, Inc. a pioneer and a recognized leader in providing Ultra-Low latency networking Mega IP building blocks, systems and solutions, announced they will showcase their 4th Gen. 76 nanosecond SX-Series 10G Ultra-Low latency TOE fully integrated with Intilop’s ultra-low-latency EMAC and Altera_PHY Mega IP cores running on BittWare’s Stratix® V S5PE FPGA board. The live demo will be showcased on September 19, 2012 at the HPC Wall Street Conference at Roosevelt Hotel in New York City.
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| July 24,2013 |
Intilop, Inc. a pioneer and a recognized leader in providing Ultra-Low latency network acceleration Mega IP cores and system solutions, announced delivery of their hyper performance FPGA-NIC system solutions using Altera’s™ Stratix IV/V powered by their industry leading 5th Gen. SX-Series 10G Ultra-Low latency 76 ns TCP and UDP Offload Cores delivering sub-micro second wire-to-host memory total latency via PCI express interface.
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| April 25,2013 |
Intilop, Inc. a pioneer and a recognized leader in providing Ultra-Low latency network acceleration Mega IP cores and systems solutions, announced they will showcase their hyper performance FPGA-NIC system solutions using Altera’s™ Stratix V Nallatech 385board powered by their 5th Gen. SX-Series 10G Ultra-Low latency 76 ns TCP and UDP Offload Cores delivering sub-micro second wire-to-host total latency.
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| Jan 29,2013 |
Intilop, Inc. a pioneer and a recognized leader in providing complex networking Mega-IP building blocks and full systems, today announced delivery of a true ultra-low latency NIC + System Platform powered by their new Ultra Low latency 5th Gen 10G Nano TOE/UOE, Ultra Low latency Media Access controller, Ultra-low latency PCIe/DMA and ultra-precise time-stamping capability.
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| November 26,2012 |
- Intilop, Inc. a pioneer and a recognized leader in providing Ultra-Low latency networking Mega IP building blocks, systems and solutions, announced they will present their 4th Gen. SX-Series 10G Ultra-Low latency TCP Offload Core and solutions based around them that deliver greater than 1G byte per 10G port and sub-micro second wire-to-host latency
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| November 08, 2012 |
Santa Clara, CA. - November. 08, 2012 -- Intilop, Inc. a pioneer and a recognized leader in providing Ultra-Low latency networking Mega IP building blocks, systems and solutions, announced they will showcase Altera’s SDK for OpenCL™ with their 4th Gen. SX-Series 10G Ultra-Low latency UDP Offload Core delivering sub-micro second wire-to-host latency.  |
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| September 17, 2012 |
Santa Clara, CA. - September. 17, 2012 -- Intilop, Inc. a pioneer and a recognized leader in providing Ultra-Low latency networking Mega IP building blocks, systems and solutions, announced they will showcase their 4th Gen. 76 nanosecond SX-Series 10G Ultra-Low latency TOE fully integrated with Intilop’s ultra-low-latency EMAC and Altera_PHY Mega IP cores running on BittWare’s Stratix® V S5PE FPGA board. |
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| September 07, 2012 |
Santa Clara, CA - September 07, 2012 - Intilop Inc., the leading developer and provider of advanced high complexity IPs, FPGAs/ASICs and system solutions in Network traffic acceleration and processing plus security and storage, today announced that the three patents filed with a total of 51 claims have been accepted by the US patent office. |
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| September 04,2012 |
Intilop Inc., the leading developer and provider of advanced high complexity IPs, FPGAs/ASICs and system solutions in Network traffic acceleration/processing, security and storage, today announced that the three patents filed with a total number of 51 claims with US patent office has been accepted.
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| July 31, 2012 |
Santa Clara, CA July 31, 2012 -- Intilop, Inc. a pioneer and a recognized leader in providing highest quality complex networking Mega-IP building blocks and full systems, today announced results of performance testing underway for past several months at a major international customer. |
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| June 18, 2012 |
Santa Clara, CA June 18, 2012 -- Intilop, Inc. a pioneer and a recognized leader in providing complex networking Mega-IP building blocks and full systems, today announced delivery of a full FPGA based System Platform powered by their new Ultra Low latency 4th Gen 10G Nano TOE and Ultra Low latency Media Access controller. It integrates Ultra-Low Latency PHY available in Altera Stratix-V FPGAs. |
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| April 05, 2012 |
Santa Clara, CA. – April 05, 2012 -- Intilop, Inc. a pioneer and a recognized leader in providing complex Ultra-Low latency networking IP building blocks and systems, today announced their new 3rd Gen 10G Ultra-Low-Latency Ethernet Media Access controller (EMAC) IP cores based around enhanced Architecture. |
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| Mar 01, 2012 |
Santa Clara and London, March 01, 2012 – Intilop, Inc. a pioneer and a recognized
leader in providing complex Ultra-low latency networking Mega-IP building blocks and systems, today announced that Fixnetix – one of the fastest growing companies in EMEAhas selected Intilop’s TCP Offload Technology to develop their low latency appliance
solutions. These are slated to be deployed around the world in the near future. |
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| Feb 17, 2012 |
Intilop, Inc. a pioneer and a recognized leader in providing highly complex
Ultra-Low latency networking Mega IP building blocks, systems and solutions, announced they will showcase
their 4th Gen. SX-Series 10G Ultra-Low latency TOE + EMAC + Altera_PHY Mega IP cores running on Stratix®
IV FPGA |
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| Feb 09, 2012 |
Intilop's CTO, K. Masood to Present "How TCP Offload Engines scale up the TCP traffic bandwidth by up to 8x on existing Ethernet Networks", at the Ethernet Summit in San Jose, CA USA. |
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| Jan 12, 2012 |
Intilop, Inc. a pioneer and a recognized leader in providing complex Ultra-Low latency networking IP building blocks and systems, today announced new 4th Gen SX-Series TCP Offload and UDP Offload IPs based around enhanced TOE Architecture, these Industry leading Ultra-Low latency 10G TOE and UOE IP products have fully integrated EMAC and optional PCIe/DMA, as a system, is geared to provide Ultra-High performance NIC functionality also. |
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| Nov 14th, 2011 |
Intilop Corporation to showcase their 3rd Generation Enhanced Ultra-low latency 10G bit TCP Offload Engine and Total system solutions for the Financial Markets at the ‘Low Latency Summit’ in New York city. |
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| Feb 9th, 2011 |
Intilop, Inc. a leading developer of advanced technology Network Acceleration hardware IPs with integrated firmware and total solutions for Networking Equipment, High Performance Computers, servers, enterprise systems for financial markets and data storage equipment markets, today announced that Kelly Masood, President and CTO of intilop Corporation will present on 10G TCP Offload Engines and 10G Ethernet MACs, at the upcoming Ethernet Technology Summit, at the Santa Marriott Hotel, Santa Clara, Calif., Thursday, Feb. 25, 2:00 p.m. (PST). |
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| Sept 27th, 2010 |
Intilop corporation announces a record breaking lowest latency & highest bandwidth 10G bit TCP offload engine. The 10G TOE and EMAC shatter the latency number at around 100 ns. It delivers near wire speed performance for small and full size packets at 10 G bps rate. This is the only TCP offload engine that is also scalable and is easily customizable to suite different types of networks and traffic types. |
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| Sept 16th, 2010 |
Intilop's team awarded a Patent in developing an advanced hardware search technology which speeds up searching of non stationary large data sets by 10 to 20 times as compared to conventional hardware search engines. |
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| August 31st, 2010 |
Intilop's (formerly intelop) is accepted by Cisco as a partner to provide value add services to Cisco's networking equipment customers leveraging their advanced networking IP products and services. |
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| August 23rd, 2010 |
Intilop's (formerly intelop) TCP/IP offload engine shatters the latency barrier of 1 microsecond offering lowest latency and highest TCP performance. It delivers wire speed performance for small and full size packets. Setting a new standard for latency sensitive financial markets and high end networking equipment markets. |
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| July 13th, 2010 |
Intilop's (formerly Intelop) TCP/IP Offload engine (TOE Engine) is proven to provide lowest latency and highest TCP/IP throughput among the available TOE engines in the market today. The performance validation was independently performed by a major worldwide Japanese Securities company with offices in USA. |
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| June 28, 2010 |
Intelop vs intel; Intelop corporation announces its name change to 'intilop'. Previously known as intelop corporation, was ordered by a district court in Santa Clara County to change their name because 'intelop' contains the name 'intel'. A name infringement lawsuit was brought on by intel corporation who had been in negotiations with intelop corporation for about 2 years regarding this matter. |
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| April 25, 2010 |
Intilop Corporation (formerly intelop) delivers a highly integrated TOE_FPGA-SOC-Platform to a major financial institution. Platform integrates intilop's TOE, PCI Express and system peripherals that raise the bar in TOE system integration. Intilop's TOE offers lowest latency, highest TCP/IP performance and smallest size for FPGA and ASIC designs. |
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| March 22, 2010 |
Intilop corporation (formerly intelop) releases a series of new TOE IP solutions that offer the fastest with lowest latency, highest TCP/IP performance and smallest size for FPGA and ASIC designs. Intilop has been a pioneer in developing customizable series of Full-Offload TOE that offer tremendous performance improvement and flexibility. |
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| March 16, 2010 |
Intilop (formerly Intilop) corporation's TCP Offload engine IP solution delivers amazing TCP/IP throughput as reported by customers in system level performance testing. This second generation Customizable Full TCP offload Engine also integrates GEMAC, ARP module, RDMA engines, PLB/405 bus interfaces. It is capable of implementing/accelerating hundreds of simultaneous TCP sessions, delivering 800 % -1500% performance improvement over TCP/IP software implementations. |
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| March 22, 2010 |
Intilop corporation (formerly intelop) releases a series of TOE IP solutions that offer the fastest with lowest latency, highest TCP/IP performance and smallest size for FPGA and ASIC designs. Intilop is a pioneer in developing customizable series of Full Offload TOE that offer tremendous performance improvement and flexibility. |
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| Feb 01, 2010 |
Intelop corporation announces a new Development platform based on Xilinx V5 FPGA for their TCP-Offload Engine SoC IP for customers to easily develop networking applications. This second generation Customizable Full TCP offload Engine also integrates GEMAC, ARP module, PLB/AMBA 2.0 bus interfaces with optional PCIe interfaces running at 2-Gbps. It is capable of implementing/ accelerating hundreds of simultaneous TCP sessions, delivering 10-20 X performance improvement over TCP/IP software implementations. |
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| Jan 18, 2010 |
Intelop announces Development platform based on Xilinx FPGA for their TCP-Offload Engine SoC IP for customers to easily develop networking applications. This second generation Customizable Full TCP offload Engine also integrates GEMAC, ARP module, PLB/AMBA 2.0 bus interfaces with Optional PCIe interfaces running at 2-Gbps. It is capable of implementing/ accelerating hundreds of simultaneous TCP sessions, delivering 10-20 X performance improvement over TCP/IP software implementations. |
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| Jan 23, 2009 |
Intilop announces TCP-Offload Engine SoC IP with integrated GEMAC, ARP module and AMBA 2.0 bus interface running at 2-Gbps capable of managing thousands of simultaneous TCP sessions |
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| Jan 15, 2009 |
Intilop delivers their second generation TCP-Offload Engine SoC IP with integrated G-bit Ethernet MAC and AMBA host bus interface SOC-FPGA to a strategic European OEM customer in Network Security systems and Telecom markets |
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| Jan 15, 2009 |
Intilop delivers their second generation TCP-Offload Engine SoC IP with integrated Ethernet MAC and AMBA bus interface SOC-FPGA to a strategic European OEM customer |
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| August 28, 2008 |
Intilop announces their second generation customizable TCP-Offload Engine at 2-Gpbs with integrated Ethernet MAC and AMBA host bus Silicon IP for SOC, ASIC and FPGA customers in Network equipment, Network Security, Telecom, SAN/NAS markets. |
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| June 27, 2007 |
Intilop
announces industry’s first customizable/scalable 1Gbps,
100M-bps Network Security Switch Silicon IP for Structured
ASIC, SoC and FPGA customers |
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June 18, 2006
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Intilop
announces industry’s first customizable/scalable Tri-speed;
1G, 100M, 10M bps intelligent switch silicon IP for ASIC, Structured
ASIC, SoC and FPGA customers |
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June 4, 2006
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Intilop
Corporation Pioneers Scalable Security Reference Platform |
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| May 16, 2006 |
Faraday
and Intilop Enter Partnership for Custom Networking ASIC and
Structured ASIC Engagements
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| April 20, 2006 |
Intilop
Selected by Faraday-Tech as a preferred IP provider/Integrator
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| March, 2006 |
Intilop
announces 10-Gigabit EMAC- customizable and scalable Tri-speed;
10G, 1G, 100M bps, intelligent Ethernet MAC silicon IP for ASIC,
Structured ASIC, SoC and FPGA customers
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| January 9, 2006 |
High
performance Multi-Giga Bit 4-port Network Security IPS appliance
delivered to customers |
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| Sept. 15, 2005 |
Intilop
Verifies Complex SoC-FPGA with multiple CPU Cores With Mentors’
Modelsim, Questa And Vera Verification Tools platforms
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| June 2005 |
Intilop
moves to a new Class A building
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| March, 2005 |
Intilop
announces customizable and scalable Tri-speed; 1G, 100M, 10M
bps, intelligent Ethernet MAC silicon IP for ASIC, Structured
ASIC, SoC and FPGA customers
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| December, 2004 |
Intilop
Corporation and Cast-Inc sign a development Partnership agreement
for Custom IP development, integration/verification of Standard
IP in SOC/ASIC/FPGA designs
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| April 29, 2004 |
Intilop
Uses Most Powerful SoC-FPGA from Xilinx to develop advanced
Network Security Appliance
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| December, 2003 |
Intilop
Corporation and Palmchip corporation sign a development Partnership
agreement for Custom IP development and software/Hardware integration,
Co-verification in an SOC development Paltform
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| 2004 |
2004-5
News Snippets |
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| 2003 |
2003 News Snippets
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