Intilop adds several Government Contractors and Universities to the elite list of Clients for their TCP & UDP Acceleration Technology and Solutions.

Another industry first: As the adaption of their TCP Acceleration Technology becomes more widespread around the globe that includes Government Security, Universities, Cloud Servers, Financial and many other equipment classes, this Security module is an add on module to their TCP and UDP Accelerators providing unprecedented functionality of Network Traffic Security combined with Full TCP & UDP Acceleration at 10G. Intilop's 40G TCP/UDP without Security module was demoed at Supercomputing 2015 in Austin, TX Security module for 40G TOE & UOE will be released in the near future.

Intilop’s 40G TCP/UDP without Security module was demoed at Supercomputing 2015 in Austin, TX in partnership with Intel/Altera

Milpitas, CA., Sep 12th, 2017  - Intilop, Inc., a pioneer, most respected and recognized leader in providing Ultra-Low latency and Hyper Performance Complex Networking Protocol Accelerators like Full TCP, UDP, IGMP & other Mega IP Cores, Systems and Solutions since 2009, signs up 5 university clients and 2 major government contractors over the past 4 months.

The adaption of their 9th Gen core that, in addition to Full TCP/UDP stack, also implements IP Fragmentation/defragmentation module for the UDP which puts frames back in order after they are broken up by the routers and in the process get out of order when they are received that causes them to be discarded. Intilop’s new solution takes care of this age old problem as well. This is very unique capability which no other UDP Accelerator has been able to accomplish. Also, the TCP and UDP Accelerators with Network Security capability, in addition to full TCP/UDP offloading , perform functions of firewall and other monitoring functions at full line rate, this security module performs port filtering, blocking, monitoring and related functions in FPGA hardware thereby relieving CPU from these tasks. They are performed in nanosecond speeds and with ultra-precision and zero jitter. During network security processing, the CPU gets bogged down under high traffic rates, sometimes missing some ‘Events’, can be used for other application functions. So this is a win-win situation for both. These TCP/UDP Accelerators and Solutions are available in Intel/Altera and Xilinx FPGA based boards
Ultra-fast and precise processing time of around 100 nanoseconds for this module including TCP and UDP with thousands of sessions initially at 10G, sets the bar much higher for speed and performance powered by a 8+ year mature and proven TCP Protocol Compliant architecture. The Security module for their latest 40G TOE is planned for Q1 2018
It was a highly significant achievement to develop this cutting edge technology rich architecture which implements IP Frag/Defrag and Network Security module coupled with TCP and UDP Accelerators running at Full 10G Line rate. 40G soon to be released. The 10G TOE has been in volume production for more than 6 years now and is deployed around the globe.
Working out of the box solutions with Choice of Cores implemented with or without security module with 1K, 512 and 256 concurrent TCP/UDP Sessions will be available later this year. 32 through 128 sessions are available as of Q4 2016.
The TCP/UDP Accelerators and Solutions are available in Intel/Altera and Xilinx FPGA based boards

Altera/Intel:
https://www.altera.com/products/design-software/embedded-software-developers/opencl/developer-zone/opencl-reference-platforms.html

Altera/Intel::
https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/br/br-intellectual-property-brochure.pdf

Xilinx:
http://www.xilinx.com/esp/datacenter/data_center_ip.html

Xilinx:
https://www.xilinx.com/products/intellectual-property/1-3zvp6w.html

Not only it offers 100 ns latency and wire speed TCP performance with security features, it also offers customization flexibility to network architects to design world-class system-level applications tailored to their specific needs.
The TOE’s architecture is highly scalable, customizable and adaptable without compromising on low latency or performance. Intilop’s product-line solutions are available in flexible FPGA/ASIC/SoC technologies which can easily accommodate diverse set of appliance maker’s technical design specifications.
As a pioneer, Intilop was the first company to deliver a series of Full TCP Offload Engines on FPGAs in 2009. Since then, they have released 8 generations, from 1G to 40G/50G, of TCP and UDP Accelerators. Their sub 100 ns latency MAC+TOE&UOE are considered a ‘Gold Standard’ by the industry experts. The latency barrier of 100 nanoseconds and throughput of more than 1 G byte/s per port had been set by them since their first 10G Series of TCP engines in 2011.

About Intilop: Intilop is a developer, provider, a recognized leader and pioneer in advanced networking silicon IP and system solutions, custom hardware solutions, SoC/ASIC/FPGA integrator and total system solutions provider for Networking, Network Security, storage and Embedded Systems.    

Information about Alpha-Data card is at: http://www.alpha-data.com/products.php?product=adm-pcie-7v3

Websites: www.intilop.com

Pricing and product info contact: info@intilop.com    Kevin@intilop.com

Intilop Corporation. 830 N Hillview Drive. Milpitas, CA 95035. PH: 408-791-6700

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